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fpga-files
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Synthesizing
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2024-01-17 12:25:46 +01:00 |
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simulation
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Semantic names for tester
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2024-01-17 14:46:35 +01:00 |
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src
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Make verilator split carry array
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2024-01-17 14:38:27 +01:00 |
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.envrc
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initial commit
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2024-01-10 22:10:01 +01:00 |
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.gitignore
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initial commit
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2024-01-10 22:10:01 +01:00 |
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flake.lock
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initial commit
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2024-01-10 22:10:01 +01:00 |
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verilator.nix
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initial commit
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2024-01-10 22:10:01 +01:00 |
