fox32-hw/flake.nix

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{
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description = "fox32 on FPGA";
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inputs = {
flake-utils.url = "github:numtide/flake-utils";
};
outputs = { self, nixpkgs, flake-utils }:
flake-utils.lib.eachDefaultSystem (sys:
let pkgs = nixpkgs.legacyPackages.${sys};
verilator = import ./verilator.nix pkgs ;
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yosys = pkgs.yosys;
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vflags = ''-Wpedantic -Wwarn-lint -Wwarn-style -Wno-PINCONNECTEMPTY -CFLAGS "-Wpedantic -std=c++20"'';
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verilate-src = cmd: ''
cp -r ${./src} ./src
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cp -r ${./simulation} ./simulation
find ./src/ -name '*.v' -exec ${verilator}/bin/verilator ${vflags} ${cmd} {} +
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'';
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lint = pkgs.runCommand "lint" {} ''
${verilate-src "--lint-only"}
echo "compiler didn't get angry :3"
: 3 > $out
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'';
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alu-sim = pkgs.runCommandCC "alu-sim" {} ''
${verilate-src "--cc --build --exe ./simulation/tester.cpp ./simulation/test_alu.cpp -top alu"}
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mv obj_dir "$out"
mkdir "$out/bin" && cp "$out/Valu" "$out/bin/alu-sim"
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'';
alu-sim-trace = pkgs.runCommandCC "alu-sim-trace" {} ''
${verilate-src "--cc --build --exe --trace -CFLAGS -DTRACE=1 ./simulation/tester.cpp ./simulation/test_alu.cpp -top alu"}
mv obj_dir "$out"
mkdir "$out/bin" && cp "$out/Valu" "$out/bin/alu-sim"
$out/bin/alu-sim $out/trace.vcd
echo "${pkgs.gtkwave}/bin/gtkwave $out/trace.vcd" > $out/bin/alu-sim-trace
chmod u+x $out/bin/alu-sim-trace
'';
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alu-synth = pkgs.runCommandCC "alu-synth" {} ''
mkdir -p "$out"
find ${./src} -name '*.v' -exec ${yosys}/bin/yosys -Q -p "synth_ice40 -top topmost -json $out/synth.json -dsp" {} +
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'';
alu-synth-view = pkgs.writeScriptBin "alu-synth-view" ''
${pkgs.nextpnrWithGui}/bin/nextpnr-ice40 --up5k --package sg48 --pcf ${./fpga-files/rot.pcf} --json ${alu-synth}/synth.json --gui
'';
deps = [
yosys pkgs.nextpnrWithGui pkgs.icestorm verilator pkgs.gtkwave
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];
in rec {
packages.verilator = verilator;
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packages.lint = lint;
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packages.alu-sim = alu-sim;
packages.alu-sim-trace = alu-sim-trace;
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packages.alu-synth = alu-synth;
packages.alu-synth-view = alu-synth-view;
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devShells.default = pkgs.mkShell {
packages = deps;
};
}
);
}