docs: Update cpu.md for new inc
/dec
instruction behavior
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@ -118,7 +118,7 @@ data.16 0x8700 data.8 20 data.8 1
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| 0x0C | ISE | none | 32 | set interrupt enable flag
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| 0x0C | ISE | none | 32 | set interrupt enable flag
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| 0x0D | MSE | none | 32 | set MMU enable flag
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| 0x0D | MSE | none | 32 | set MMU enable flag
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| 0x10 | HALT | none | 8/16/32 | halt CPU
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| 0x10 | HALT | none | 8/16/32 | halt CPU
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| 0x11 | INC | src | 8/16/32 | increment (add 1)
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| 0x11 | INC | src | 8/16/32 | increment (add 1 << tgt in opcode encoding)
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| 0x13 | OR | src+tgt | 8/16/32 | bitwise OR
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| 0x13 | OR | src+tgt | 8/16/32 | bitwise OR
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| 0x14 | IMUL | src+tgt | 8/16/32 | multiply (signed)
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| 0x14 | IMUL | src+tgt | 8/16/32 | multiply (signed)
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| 0x15 | SRL | src+tgt | 8/16/32 | shift right logical (with zero extension)
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| 0x15 | SRL | src+tgt | 8/16/32 | shift right logical (with zero extension)
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@ -143,7 +143,7 @@ data.16 0x8700 data.8 20 data.8 1
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| 0x2A | RET | none | 32 | return from function
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| 0x2A | RET | none | 32 | return from function
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| 0x2C | INT | src | 32 | raise interrupt
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| 0x2C | INT | src | 32 | raise interrupt
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| 0x2D | TLB | src | 32 | flush TLB and set page directory pointer
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| 0x2D | TLB | src | 32 | flush TLB and set page directory pointer
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| 0x31 | DEC | src | 8/16/32 | decrement (subtract 1)
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| 0x31 | DEC | src | 8/16/32 | decrement (subtract 1 << tgt in opcode encoding)
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| 0x32 | REM | src+tgt | 8/16/32 | calculate remainder of division (unsigned)
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| 0x32 | REM | src+tgt | 8/16/32 | calculate remainder of division (unsigned)
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| 0x33 | NOT | src | 8/16/32 | bitwise NOT
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| 0x33 | NOT | src | 8/16/32 | bitwise NOT
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| 0x34 | IDIV | src+tgt | 8/16/32 | divide (signed)
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| 0x34 | IDIV | src+tgt | 8/16/32 | divide (signed)
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