Merge pull request #14 from neuschaefer/dev

Documentation improvements
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Ry 2023-02-05 15:02:49 -08:00 committed by GitHub
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2 changed files with 74 additions and 49 deletions

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@ -55,6 +55,16 @@ by a source operand, or by source and target operands, depending on the opcode.
| 15:14 | size | operation size, e.g. 32 bits | 15:14 | size | operation size, e.g. 32 bits
NOTE: Although in the instruction encoding the source operand comes first,
followed by the target operand, the order is reversed in the fox32 assembly
language. The following lines are equivalent:
```
cmp r1, r20
data.16 0x8700 data.8 20 data.8 1
```
### Operand types ### Operand types
| value | description | size of operand | what's actually stored? | value | description | size of operand | what's actually stored?

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@ -1,53 +1,68 @@
# Fox32 instructions # Fox32 instructions
This file describes every fox32 instruction in detail. For a general This file describes every fox32 instruction in detail. For a general
description of the fox32 CPU, see cpu.md. description of the fox32 CPU and instruction encoding details, see [cpu.md](./cpu.md).
## NOP: no operation
## ADD: add ## Arithmetic instructions
## MUL: multiply (unsigned)
## AND: bitwise AND ### ADD: add
## SLA: shift left ### SUB: subtract
## SRA: shift right arithmetic (with sign extension) ### INC: increment (add 1)
## BSE: bit set ### DEC: decrement (subtract 1)
## CMP: compare ### CMP: compare
## JMP: absolute jump ### AND: bitwise AND
## RJMP: relative jump ### OR: bitwise OR
## PUSH: push value to stack ### NOT: bitwise NOT
## IN: get input from I/O bus ### XOR: bitwise XOR
## ISE: set interrupt enable flag ### BSE: bit set
## MSE: set MMU enable flag ### BCL: bit clear
## HALT: halt CPU ### BTS: test if bit set
## INC: increment (add 1) ### SLA: shift left
## OR: bitwise OR ### SRA: shift right arithmetic (with sign extension)
## IMUL: multiply (signed) ### SRL: shift right logical (with zero extension)
## SRL: shift right logical (with zero extension) ### ROL: rotate left
## BCL: bit clear ### ROR: rotate right
## MOV: move value ### MUL: multiply (unsigned)
## CALL: absolute call ### IMUL: multiply (signed)
## RCALL: relative call ### DIV: divide (unsigned)
## POP: pop value from stack ### IDIV: divide (signed)
## OUT: output on I/O bus ### REM: calculate remainder of division (unsigned)
## ICL: clear interrupt enable flag ### IREM: remainder (signed)
## MCL: clear MMU enable flag ### NOP: no operation
## BRK: debug breakpoint ### MOV: move value
## SUB: subtract ### MOVZ: move value and clear upper bits in target register
## DIV: divide (unsigned) ### RTA: calculate address relative to instruction pointer
## XOR: bitwise XOR
## ROL: rotate left ## Stack instructions
## ROR: rotate right
## BTS: test if bit set ### PUSH: push value to stack
## MOVZ: move value and clear upper bits in target register ### POP: pop value from stack
## LOOP: absolute loop
## RLOOP: relative loop ## Control flow instructions
## RET: return from function
## INT: raise interrupt ### JMP: absolute jump
## TLB: flush TLB and set page directory pointer ### RJMP: relative jump
## DEC: decrement (subtract 1) ### LOOP: absolute loop
## REM: calculate remainder of division (unsigned) ### RLOOP: relative loop
## NOT: bitwise NOT ### CALL: absolute call
## IDIV: divide (signed) ### RCALL: relative call
## IREM: remainder (signed) ### RET: return from function
## RTA: calculate address relative to instruction pointer ### RETI: return from interrupt
## RETI: return from interrupt ### ISE: set interrupt enable flag
## FLP: flush page from TLB ### ICL: clear interrupt enable flag
### BRK: debug breakpoint
### INT: raise interrupt
### HALT: halt CPU
## MMU instructions
### MSE: set MMU enable flag
### MCL: clear MMU enable flag
### FLP: flush page from TLB
### TLB: flush TLB and set page directory pointer
## I/O instructions
### IN: get input from I/O bus
### OUT: output on I/O bus