2022-01-27 07:21:21 +01:00
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# Encoding
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```
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size instr . cond dest src <src> <dest>
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xx xxxxxx 0 xxx xx xx <8,16,32 bits> <8,16,32 bits>
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```
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# Size table
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2022-01-27 07:50:19 +01:00
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If the instruction doesn't allow variable sizes or a size was not specified, set the size bits to Word (0b10)
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2022-01-27 07:21:21 +01:00
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| :--: | -------------- |
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| 0b00 | byte (8 bits) |
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| 0b01 | half (16 bits) |
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| 0b10 | word (32 bits) |
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# Instruction table
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| 0x | -0 | -1 | -2 | -3 | -4 | -5 | -6 | -7 | -8 | -9 | -A | -B | -C | -D | -E | -F |
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| :-: | ---- | ------------- | ------------- | ------------- | ------------- | ------------- | ------------- | -------------- | ---- | ----- | -------------- | --- | --- | --- | --- | --- |
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| 0- | NOP | ADD[.8,16,32] | MUL[.8,16,32] | AND[.8,16,32] | SLA[.8,16,32] | SRA[.8,16,32] | BSE[.8,16,32] | CMP[.8,16,32] | JMP | RJMP | PUSH[.8,16,32] | IN | ISE | | | |
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| 1- | HALT | INC[.8,16,32] | POW[.8,16,32] | OR[.8,16,32] | | SRL[.8,16,32] | BCL[.8,16,32] | MOV[.8,16,32] | CALL | RCALL | POP[.8,16,32] | OUT | ICL | | | |
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| 2- | BRK | SUB[.8,16,32] | DIV[.8,16,32] | XOR[.8,16,32] | ROL[.8,16,32] | ROR[.8,16,32] | BTS[.8,16,32] | MOVZ[.8,16,32] | LOOP | RLOOP | RET | | | | | |
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| 3- | | DEC[.8,16,32] | REM[.8,16,32] | NOT[.8,16,32] | | | | | | RTA | RETI | | | | | |
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# Condition table
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| :---: | -------- |
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| 0b000 | (always) |
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| 0b001 | IFZ |
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| 0b010 | IFNZ |
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| 0b011 | IFC |
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| 0b100 | IFNC |
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# Destination table
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| :--: | ------------------- |
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| 0b00 | register |
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| 0b01 | register (pointer) |
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| 0b10 | immediate (pointer) |
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# Source table
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| :--: | ------------------- |
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| 0b00 | register |
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| 0b01 | register (pointer) |
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| 0b10 | immediate |
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| 0b11 | immediate (pointer) |
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