49 lines
1.4 KiB
Nix
49 lines
1.4 KiB
Nix
{
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description = "fox32 on FPGA";
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inputs = {
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flake-utils.url = "github:numtide/flake-utils";
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};
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outputs = { self, nixpkgs, flake-utils }:
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flake-utils.lib.eachDefaultSystem (sys:
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let pkgs = nixpkgs.legacyPackages.${sys};
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verilator = import ./verilator.nix pkgs ;
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vflags = ''-Wpedantic -Wwarn-lint -Wwarn-style -CFLAGS "-Wpedantic -std=c++20"'';
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verilate-src = cmd: ''
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cp -r ${./verilog-src} ./verilog-src
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cp -r ${./simulation} ./simulation
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find ./verilog-src/ -name '*.v' -exec ${verilator}/bin/verilator ${vflags} ${cmd} {} +
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'';
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lint = pkgs.runCommand "lint" {} ''
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${verilate-src "--lint-only"}
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echo "compiler didn't get angry :3"
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: 3 > $out
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'';
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alu-sim = pkgs.runCommandCC "alu-sim" {} ''
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${verilate-src "--cc --build --exe ./simulation/tester.cpp ./simulation/test_alu.cpp"}
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mv obj_dir "$out"
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mkdir "$out/bin" && cp "$out/Valu" "$out/bin/alu-sim"
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'';
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deps = with pkgs; [
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yosys nextpnrWithGui icestorm verilator
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];
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in rec {
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packages.verilator = verilator;
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packages.lint = lint;
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packages.alu-sim = alu-sim;
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devShells.default = pkgs.mkShell {
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packages = deps;
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};
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}
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);
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}
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