xenia 1f53f7e90f Pretty up the testing framework, split into files		2024-01-12 22:32:45 +01:00
fpga-files	Start work on ALU	2024-01-12 13:44:33 +01:00
simulation	Pretty up the testing framework, split into files	2024-01-12 22:32:45 +01:00
verilog-src	Update test_alu with a Tester class	2024-01-12 20:45:05 +01:00
.envrc	initial commit	2024-01-10 22:10:01 +01:00
.gitignore	initial commit	2024-01-10 22:10:01 +01:00
flake.lock	initial commit	2024-01-10 22:10:01 +01:00
flake.nix	Pretty up the testing framework, split into files	2024-01-12 22:32:45 +01:00
verilator.nix	initial commit	2024-01-10 22:10:01 +01:00