initial commit

This commit is contained in:
xenia 2024-01-10 22:08:18 +01:00
commit 8c126980a6
8 changed files with 248 additions and 0 deletions

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.envrc Normal file
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use flake

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.gitignore vendored Normal file
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.direnv

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flake.lock Normal file
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{
"nodes": {
"flake-utils": {
"inputs": {
"systems": "systems"
},
"locked": {
"lastModified": 1694529238,
"narHash": "sha256-zsNZZGTGnMOf9YpHKJqMSsa0dXbfmxeoJ7xHlrt+xmY=",
"owner": "numtide",
"repo": "flake-utils",
"rev": "ff7b65b44d01cf9ba6a71320833626af21126384",
"type": "github"
},
"original": {
"owner": "numtide",
"repo": "flake-utils",
"type": "github"
}
},
"nixpkgs": {
"locked": {
"lastModified": 1697009197,
"narHash": "sha256-viVRhBTFT8fPJTb1N3brQIpFZnttmwo3JVKNuWRVc3s=",
"owner": "NixOS",
"repo": "nixpkgs",
"rev": "01441e14af5e29c9d27ace398e6dd0b293e25a54",
"type": "github"
},
"original": {
"id": "nixpkgs",
"type": "indirect"
}
},
"root": {
"inputs": {
"flake-utils": "flake-utils",
"nixpkgs": "nixpkgs"
}
},
"systems": {
"locked": {
"lastModified": 1681028828,
"narHash": "sha256-Vy1rq5AaRuLzOxct8nz4T6wlgyUR7zLU309k9mBC768=",
"owner": "nix-systems",
"repo": "default",
"rev": "da67096a3b9bf56a91d16901293e51ba5b49a27e",
"type": "github"
},
"original": {
"owner": "nix-systems",
"repo": "default",
"type": "github"
}
}
},
"root": "root",
"version": 7
}

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flake.nix Normal file
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{
description = "ice40 testing";
inputs = {
flake-utils.url = "github:numtide/flake-utils";
};
outputs = { self, nixpkgs, flake-utils }:
flake-utils.lib.eachDefaultSystem (sys:
let pkgs = nixpkgs.legacyPackages.${sys};
verilator = import ./verilator.nix pkgs ;
rot-sim = pkgs.runCommandCC "rot-sim" {} ''
cp "${./rot.v}" rot.v
${verilator}/bin/verilator --cc -O3 --exe --build --trace ${./sim_main.cpp} rot.v
mv obj_dir "$out"
'';
rot-trace = pkgs.runCommand "rot-trace" {} ''
mkdir "$out"
${rot-sim}/Vrot $out/trace.vcd
'';
rot-trace-view = pkgs.writeScriptBin "rot-view" ''
${pkgs.gtkwave}/bin/gtkwave ${rot-trace}/trace.vcd
'';
rot-synth = pkgs.runCommand "rot-synth" {} ''
mkdir "$out"
${pkgs.yosys}/bin/yosys -p "read -vlog95 ${./rot.v} ; synth_ice40 -json $out/synth.json"
'';
rot-route = pkgs.runCommand "rot-route" {} ''
mkdir "$out"
${pkgs.nextpnr}/bin/nextpnr-ice40 --pcf ${./rot.pcf} --json ${rot-synth}/synth.json --asc $out/routed.asc --up5k --top rot --freq 12
'';
rot-pack = pkgs.runCommand "rot-pack" {} ''
mkdir "$out"
${pkgs.icestorm}/bin/icepack ${rot-route}/routed.asc $out/packed.bin
'';
rot-upload = pkgs.writeScriptBin "rot-upload" ''
${pkgs.icestorm}/bin/iceprog ${rot-pack}/packed.bin
'';
deps = with pkgs; [
yosys nextpnrWithGui icestorm verilator
];
in rec {
packages.verilator = verilator;
packages.rot-sim = rot-sim;
packages.rot-trace = rot-trace;
packages.rot-trace-view = rot-trace-view;
packages.rot-synth = rot-synth;
packages.rot-route = rot-route;
packages.rot-pack = rot-pack;
packages.rot-upload = rot-upload;
devShells.default = pkgs.mkShell {
packages = deps;
};
}
);
}

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rot.pcf Normal file
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set_io D0 23
set_io D1 27
set_io D2 21
set_io D3 25
set_io clk 35

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rot.v Normal file
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module rot (input clk, output D0, output D1, output D2, output D3);
reg ready = 0;
reg [23:0] divider;
reg [3:0] rot;
always @(posedge clk) begin
if (ready)
begin
if (divider == 12_000_000)
begin
divider <= 0;
rot <= {rot[2], rot[1], rot[0], rot[3]};
end
else
divider <= divider + 1;
end
else begin
ready <= 1;
rot <= 4'b1;
divider <= 0;
end
end
assign D0 = rot[0];
assign D1 = rot[1];
assign D2 = rot[2];
assign D3 = rot[3];
endmodule

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#include "Vrot.h"
#include "verilated.h"
#include "verilated_vcd_c.h"
int main(int argc, char** argv) {
VerilatedContext* contextp = new VerilatedContext;
contextp->commandArgs(argc, argv);
Vrot* rot = new Vrot{contextp};
Verilated::traceEverOn(true);
VerilatedVcdC* tracer = new VerilatedVcdC;
if (argc == 2) {
rot->trace(tracer, 10);
tracer->open(argv[1]);
}
while (!contextp->gotFinish() && contextp->time() < 100000) {
contextp->timeInc(1);
rot->clk = 1;
rot->eval();
tracer->dump(contextp->time());
contextp->timeInc(1);
rot->clk = 0;
rot->eval();
tracer->dump(contextp->time());
}
tracer->close();
delete rot;
delete contextp;
return 0;
}

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verilator.nix Normal file
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pkgs: with pkgs;
# From https://github.com/NixOS/nixpkgs/blob/nixos-23.11/pkgs/applications/science/electronics/verilator/default.nix
# Patches out SystemC-support, as the SystemC does not build on Darwin
stdenv.mkDerivation rec {
pname = "verilator";
version = "5.018";
src = fetchFromGitHub {
owner = pname;
repo = pname;
rev = "v${version}";
hash = "sha256-f06UzNw2MQ5me03EPrVFhkwxKum/GLDzQbDNTBsJMJs=";
};
enableParallelBuilding = true;
buildInputs = [ perl python3 ]; # ccache
nativeBuildInputs = [ makeWrapper flex bison autoconf help2man git ];
nativeCheckInputs = [ which numactl ]; # cmake
doCheck = stdenv.isLinux; # darwin tests are broken for now...
checkTarget = "test";
preConfigure = "autoconf";
postPatch = ''
patchShebangs bin/* src/* nodist/* docs/bin/* examples/xml_py/* \
test_regress/{driver.pl,t/*.{pl,pf}} \
ci/* ci/docker/run/* ci/docker/run/hooks/* ci/docker/buildenv/build.sh
'';
# grep '^#!/' -R . | grep -v /nix/store | less
# (in nix-shell after patchPhase)
postInstall = lib.optionalString stdenv.isLinux ''
for x in $(ls $out/bin/verilator*); do
wrapProgram "$x" --set LOCALE_ARCHIVE "${glibcLocales}/lib/locale/locale-archive"
done
'';
meta = with lib; {
description = "Fast and robust (System)Verilog simulator/compiler and linter";
homepage = "https://www.veripool.org/verilator";
license = with licenses; [ lgpl3Only artistic2 ];
platforms = platforms.unix;
maintainers = with maintainers; [ thoughtpolice amiloradovsky ];
};
}