fox32-hw/flake.nix

{
  description = "fox32 on FPGA";

  inputs = {
    flake-utils.url = "github:numtide/flake-utils";
  };

  outputs = { self, nixpkgs, flake-utils }:
    flake-utils.lib.eachDefaultSystem (sys:
      let pkgs = nixpkgs.legacyPackages.${sys};

          verilator = import ./verilator.nix pkgs ;

          vflags = ''-Wpedantic -Wwarn-lint -Wwarn-style -Wno-PINCONNECTEMPTY -CFLAGS "-Wpedantic -std=c++20"'';

          verilate-src = cmd: ''
            cp -r ${./verilog-src} ./verilog-src
            cp -r ${./simulation} ./simulation
            find ./verilog-src/ -name '*.v' -exec ${verilator}/bin/verilator ${vflags} ${cmd} {} +
          '';

          lint = pkgs.runCommand "lint" {} ''
             ${verilate-src "--lint-only"}
             echo "compiler didn't get angry :3"
             : 3 > $out
          '';

          alu-sim = pkgs.runCommandCC "alu-sim" {} ''
            ${verilate-src "--cc --build --exe ./simulation/tester.cpp ./simulation/test_alu.cpp"}
            mv obj_dir "$out"
            mkdir "$out/bin" && cp "$out/Valu" "$out/bin/alu-sim"
          '';

          deps = with pkgs; [
            yosys nextpnrWithGui icestorm verilator
          ];
      in rec {
        packages.verilator = verilator;

        packages.lint = lint;

        packages.alu-sim = alu-sim;
        devShells.default = pkgs.mkShell {
          packages = deps;
        };
      }
    );
}