fox32-hw/simulation/test_alu.cpp

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#include "Valu.h"
#include "verilated.h"
#include "tester.hpp"
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int main(int argc, char **argv) {
VerilatedContext *vctx = new VerilatedContext;
Valu *valu = new Valu(vctx);
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Tester alu_t("alu");
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{
Tester add_t(&alu_t, "add");
{
Tester add_case(&add_t, "0x2137+0x1234");
valu->op = 0b000;
valu->A = 0x2137;
valu->B = 0x1234;
valu->eval();
add_case.assert_eq("O == 0x336b", valu->O, 0x336b);
add_case.assert_eq("no overflow", valu->Fflow, 0x0);
add_case.assert_eq("no Fzero", valu->Fzero, 0x0);
}
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{
Tester add_case(&add_t, "0x9+0x10");
valu->op = 0b000;
valu->A = 0x9;
valu->B = 0x10;
valu->eval();
add_case.assert_eq("O == 0x19", valu->O, 0x19);
add_case.assert_eq("no overflow", valu->Fflow, 0x0);
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add_case.assert_eq("no Fzero", valu->Fzero, 0x0);
}
{
Tester add_case(&add_t, "0x5555+0x5555");
valu->op = 0b000;
valu->A = 0x5555;
valu->B = 0x5555;
valu->eval();
add_case.assert_eq("O == 0xaaaa", valu->O, 0xaaaa);
add_case.assert_eq("no overflow", valu->Fflow, 0x0);
add_case.assert_eq("no Fzero", valu->Fzero, 0x0);
}
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{
Tester add_case(&add_t, "0xffffffff+0x1");
valu->op = 0b000;
valu->A = 0xffffffff;
valu->B = 0x1;
valu->eval();
add_case.assert_eq("O == 0x0", valu->O, 0x0);
add_case.assert_eq("has overflow", valu->Fflow, 0x1);
add_case.assert_eq("has Fzero", valu->Fzero, 0x1);
}
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}
{
Tester sub_t(&alu_t, "sub");
{
Tester sub_case(&sub_t, "0x2137-0x0420");
valu->op = 0b001;
valu->A = 0x2137;
valu->B = 0x0420;
valu->eval();
sub_case.assert_eq("O == 0x1d17", valu->O, 0x1d17);
sub_case.assert_eq("no underflow", valu->Fflow, 0x0);
sub_case.assert_eq("no Fzero", valu->Fzero, 0x0);
}
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{
Tester sub_case(&sub_t, "0x100-0x200");
valu->op = 0b001;
valu->A = 0x100;
valu->B = 0x200;
valu->eval();
sub_case.assert_eq("O == 0xffffff00", valu->O, 0xffffff00);
sub_case.assert_eq("has underflow", valu->Fflow, 0x1);
sub_case.assert_eq("no Fzero", valu->Fzero, 0x0);
}
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{
Tester sub_case(&sub_t, "0x0-0x1");
valu->op = 0b001;
valu->A = 0x0;
valu->B = 0x1;
valu->eval();
sub_case.assert_eq("O == 0xffffffff", valu->O, 0xffffffff);
sub_case.assert_eq("has underflow", valu->Fflow, 0x1);
sub_case.assert_eq("no Fzero", valu->Fzero, 0x0);
}
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{
Tester sub_case(&sub_t, "0x20-0x20");
valu->op = 0b001;
valu->A = 0x20;
valu->B = 0x20;
valu->eval();
sub_case.assert_eq("O == 0x0", valu->O, 0x0);
sub_case.assert_eq("no underflow", valu->Fflow, 0x0);
sub_case.assert_eq("has Fzero", valu->Fzero, 0x1);
}
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}
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}